The present invention relates to switching circuitry, and in particular, to a transistor switching circuitry providing improved signal performance at high frequencies.
Analog or digital switches are employed for connecting two points in signal path to one another. Usually, such switches employ a semiconductor device which is connected between the two points. When the semiconductor device is rendered conductive, it completes a circuit between the two points, and when the device is rendered non-conductive, it opens the circuit between the two points. It is common to use transistors as switches, the most widely used examples including bipolar junction transistor (BJT), field effect transistor (FET), junction FET (JFET), metal-oxide semiconductor FET (MOSFET) and other known types of transistors used in electronic industry.
A typical example of the prior art switch 10 is shown in FIG. 1. It comprises a switching means represented by an NMOS transistor 12, whose source 14 is connected to an input node 18 of an input means 20, the input node being a first circuitry point, and whose drain 16 is connected to an output node 22 of an output means 24, the output node being a second circuitry point. The input means 20 has an output resistance R2, and the output means 24 has an input resistance R3, usually R3 being much larger than R2. The gate 26 of the transistor 12 is connected to the control means 28 which sends a control signal to the gate 26 to open or close the transistor 12. The control means has an internal resistance R0 which is small compared to the output resistance R2 and the input resistance R3. When the control signal is below a predetermined threshold value, the transistor 12 is cut off and therefore is non-conducting, which means that the input and output nodes 18 and 22 along a signal path are disconnected. Alternatively, when the control signal is above the threshold value, the transistor 12 is conducting, and the two nodes 18 and 22 along the signal path are connected to each other.
There is a drawback associated with the above circuitry. It is known that semiconductor devices have internal distributed resistance and capacitance inherently coupled into the devices due to their internal structure. For example, MOSFET transistors have dominant capacitive effect due to the gate-to-channel capacitance which can be modeled by a single capacitor between the gate and the conducting channel. The corresponding distributed capacitor Cch associated with the internal structure of the transistor 12 is designated by numeral 29 in FIG. 1 (the corresponding distributed resistance Rch of the transistor 12 is not shown). The presence of the distributed capacitor Cch influences the frequency characteristics of the switching circuitry 10. The capacitor Cch and the resistor R2 form a resistor-capacitance circuit R2Cch which results in the following transfer function of the switching circuitry 10:
T=Vout/Vin=1/(1+jxcfx89CchR2)xe2x80x83xe2x80x83(1)
where Vin and Vout are input and output voltages at the input and output nodes 18 and 22 respectively, xcfx89 is frequency of the transmitted signal, and j={square root over (xe2x88x921)}. As follows from equation (1), the RC circuit operates as a low pass filter, and the switching circuitry 10 cuts off high frequency signals starting approximately at xcfx89xcx9c1/(R2Cch). As a result, the circuitry 10 exhibits substantial signal degradation at high frequencies which is not acceptable in many practical situations.
Accordingly, there is a need in electronic industry for designing alternative switching circuitry which would reduce or eliminate the influence of the parasitic capacitance and provide no or substantially reduced signal degradation at high frequencies.
It is therefore an object of the invention to provide a switching circuitry which would avoid the afore-mentioned problem.
According to one aspect of the invention there is provided a switching circuitry, comprising:
a semiconductor device having an input node and an output node, the input node being connected to an input means having an output resistance R2, and the output node being connected to an output means having an input resistance R3;
the semiconductor device having a first state where the first node and the second node are substantially electrically connected, and a second state where the nodes are substantially electrically disconnected;
the semiconductor device being responsive to a control signal generated by a control means, having an output resistance R1, to provide switching of the device between the first and the second states;
the switching circuitry being characterized in that the output resistance of the control means R1 is greater than the output resistance of the input means R2 i.e. R1 greater than R2, thereby ensuring that switching of an electrical signal is provided so that signal degradation at high frequencies is substantially reduced or eliminated.
Preferably, the control means has the output resistance which is much greater than the output resistance of the input means, i.e. R1 greater than  greater than R2. It provides voltage gain and phase shift between the output and input voltages approaching unity and zero respectively at high frequencies, thus ensuring no signal degradation. Usually the output resistance of the control means is of the order of magnitude or greater than the input resistance of the output means, i.e. R1xe2x89xa7R3. Other arrangements when R1 greater than  greater than R3 and/or R3 greater than  greater than R2 are also possible. Conveniently, the resistance R1 can have a variable magnitude, e.g. being formed as a digitally controlled resistive network to provide digital control of resistance of the resistor R1. It is implied that magnitude of R1 may vary depending on the signal generated by the control means and/or on the state of semiconductor device (conducting or non-conducting). It is beneficial to have resistances R1 and R2 that are matched to provide stability of the circuitry characteristics. It would also be beneficial for the resistance R3 to have a layout matched to the resistances R1 and R2.
Advantageously, the semiconductor device of the switching circuitry comprises a transistor which is selected from the group consisting of BJT transistor, FET transistor, JFET transistor, MOSFET transistor, depletion type MOSFET transistor, enhanced type MOSFET transistor and MESFET transistor. Conveniently, the switching circuitry comprises one of the PMOS and NMOS transistors, where the control means are connected to the gate of the transistor, the source of the transistor being the input node and the drain being the output node. It is also possible to interchange source and gain of the transistor, using them as output and input nodes respectively. Alternatively, the circuitry may comprise the semiconductor device including a first transistor and a second transistor, the transistors having a complimentary structure and arranged so that the source of the first transistor is connected to the drain of the second transistor to form one of the input and output nodes, and the source of the second transistor is connected to the drain of the first transistor to form the other node;
the control means comprising a first output connected to the gate of the first transistor through a first output resistance R,a, and a second output connected to the gate of the second transistor through a second output resistance R1b, the first and second outputs generating complimentary control signals for switching the semiconductor device between the first and second states, and the circuitry being characterized in that R1,a, R1,b greater than R2, and R1,a, R1,bxcx9cR3.
Beneficially, R1,a,R1,b greater than  greater than R2 and R1,a,R1,bxe2x89xa7R3. Alternatively, instead of one control means having two complimentary outputs, the control means may comprise a first control means and a second control means generating complimentary signals.
Though control means output resistance R1 may be formed by means of a resistor, various modifications are also possible. For example, the control means output resistance may be formed by means of an output resistance of a long channel inverter, by means of a resistor and a long channel inverter coupled in series and/or by means of a known semiconductor device having a resistance.
The switching circuitry described above has numerous applications, e.g. in a power down circuit, input/output amplifier, input/output pad, telephone switch and video switch, being capable of switching signals whose transmittance frequency is higher than the frequency of switching. Depending on the application being used, the switching circuitry is capable of switching digital or analog signals.
According to another aspect of the invention there is provided a method of connecting/disconnecting a first and second circuitry points along a signal path, comprising the steps of:
generating an electrical signal by an input means having an input node and characterized by an output resistance R2, the input node being the first circuitry point;
the signal to be received by an output means having the output node and characterized by an input resistance R3, the output node being the second circuitry point;
transmitting the signal through a switching means disposed between the first and second circuitry points, the switching means having a first state where the circuitry points are substantially electrically connected, and a second state where the circuitry points are substantially electrically disconnected, the switching means being responsive to a control signal generated by a control means having an output resistance R1;
arranging that R1 greater than R2, thereby ensuring that connection and disconnection of the first and second circuitry points takes place without substantial signal degradation at high frequencies.
By arranging R1 greater than  greater than R2 (and conveniently using R1xe2x89xa7R3) it is provided that the voltage gain of the circuitry approaches unity while phase shift between output and input voltages tends to zero, thus ensuring high quality circuitry characteristics. Conveniently, it may be arranged that R1 greater than  greater than R3 and/or R3 greater than  greater than R2. The method suitable for operation with digital signals. It also can be used for operation with analog signals.
According to yet another aspect of the invention there is provided a method of controlling voltage gain and phase shift for a high frequency electrical signal passing through a switching circuitry, comprising the steps of:
generating an electrical signal by an input means having the input node and characterized by an output resistance R2. the signal to be received by an output means having the output node and characterized by an input resistance R3;
transmitting the signal through a switching means disposed between the input node and the output node along a signal path, the switching means having a first state where the nodes are substantially electrically connected, and a second state where the nodes are substantially electrically disconnected, the switching means being responsive to a control signal generated by a control means having an output resistance R1;
varying the ratio of R2/R1 to provide predetermined signal characteristics at high frequencies, whereby the lower the ratio, the higher the voltage gain and the smaller phase shift between output and input voltages resulting in the lower deterioration of the signal.
Conveniently, it is arranged that R1xe2x89xa7R3 or R1 greater than  greater than R3 and/or R3 greater than  greater than R2. Similar to the above, the method is suitable for operation with digital and analog signals.
Thus, the switching circuitry of the invention provides connecting/disconnecting of two nodes of the circuitry along the signal path in such a manner that the influence of the parasitic capacitance of the semiconductor device is reduced, which results in substantially reduced or completely eliminated signal degradation at high frequencies. The operation of the circuitry also provides a method of connecting/disconnecting two circuitry points along a signal path ensuring reduced or eliminated signal degradation at high frequencies. Additionally, it provides a convenient method of controlling high frequency voltage gain and phase shift of an electrical signal passing through a switching circuitry by varying the ratio of the output resistance of the input means over the output resistance of the control means, i.e. by varying R2/R1.